Must Read Rumors

Kate Middleton and Prince William’s Canada tour: Canada sets etiquette rules for meeting the royals

Canada has issued a guideline for the Duke and Duchess’ visit in the country.

Kate Middleton, Prince William and children arrive in Canada for royal tour

The Duke and Duchess of Cambridge, née Kate Middleton, and their two adorable children, George and Charlotte, landed in Canada this Saturday, September 24.

Kate Middleton and Prince William’s Canada tour itinerary revealed

The Duke and Duchess of Cambridge, née Kate Middleton, and their two children have started their official Canadian tour today.

Kate Middleton voted UK’s most influential fashion icon

The Duchess of Cambridge, née Kate Middleton, is no stranger to fashion, elegance and high class.

Pippa Middleton talks fiancé, new cook food, being labeled a ‘party girl’

In a rare interview, Pippa opened up about her new book, her fiancé and the difficulties of being Duchess Kate’s sister.

Kate Middleton and Prince William’s Canada tour: Canada sets etiquette rules for meeting the royals
Kate Middleton, Prince William and children arrive in Canada for royal tour
Kate Middleton and Prince William’s Canada tour itinerary revealed
Kate Middleton voted UK’s most influential fashion icon
Pippa Middleton talks fiancé, new cook food, being labeled a ‘party girl’

iPhone 5 rumors: “macroscalar” architecture to be featured on iPhone 5 and iPad 3?

by Nicole
February 7, 2012 at 2:10 pm

A trademark application from Apple for the word “Macroscalar” was published by the US Patent & Trademark Office last week.

Apparently, the Cupertino tech giant is getting ready to implement the technology on its upcoming products, which many assume to be the highly-anticipated iPhone 5 and iPad 3.

Macroscalar provide better support for the performance of a processor, while consuming less power.

Last year in July, ZDNet wrote an article in which they detailed Apple’s macroscalar architecture, explaining how the technology could help to improve the processor efficiency.

“The macroscalar processor addresses this problem in a new way: at compile-time it generates contingent secondary instructions so when a data-dependent loop completes the next set of instructions are ready to execute. In effect, it loads another pipeline for, say, completing a loop, so the pipeline remains full whether the loop continues or completes. It can also load a set of sequential instructions that run within or between loops, speeding execution as well.”

The patent summary describes an example of where “a processor receives instructions of a program loop having a vector block and a sequence block intended to be executed after the vector block, where the processor includes multiple slices and each of the slices is capable of executing an instruction of an iteration of the program loop substantially in parallel. For each iteration of the program loop, the processor executes an instruction of the sequence block using one of the slices while executing instructions of the vector block using a remainder of the slices substantially in parallel.”

Here are some examples of software that Apple believes this processor might be featured on in the future:

“Computer software for personal information management; database management software; database synchronization software; character recognition software; voice recognition software; speech to text conversion software; voice-enabled software applications.”

Apple is likely to develop this type of architecture since the company designs its own processors, software and hardware.

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